Operating device of cross-power domain multiprocessor and communication method thereof

Abstract

An operating device of a cross-power domain multiprocessor and a communication method thereof. The device includes: at least two processors, wherein each is connected with a processor channel connected with a memory, and the processor channel includes read and write channels; the memory and an interface parsing unit for controlling the processor channels; the memory includes a shared memory unit and a dedicated memory of each processor; a memory allocation unit for allocating the shared memory and a detection wake-up unit for detecting a processor state and receiving a data transmission command. When the processor with a receiving end in a dormant mode is awoken, information can be saved in the shared memory and processed according to the information priority after the processor is completely awake. The shared memory performs dynamic allocation according to the quantity of the wake-up processors, which improves the communication efficiency between the memory and processors.