The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 27, 2024

Filed:

Jan. 24, 2022
Applicant:

Kioxia Corporation, Tokyo, JP;

Inventor:

Naoki Yasuda, Mie, JP;

Assignee:

Kioxia Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/1157 (2017.01); H01L 21/02 (2006.01); H01L 21/28 (2006.01); H01L 29/10 (2006.01); H01L 29/423 (2006.01); H01L 29/51 (2006.01); H10B 43/10 (2023.01); H10B 43/27 (2023.01); H10B 43/35 (2023.01);
U.S. Cl.
CPC ...
H10B 43/35 (2023.02); H01L 21/0214 (2013.01); H01L 21/02164 (2013.01); H01L 21/0217 (2013.01); H01L 21/0223 (2013.01); H01L 21/02326 (2013.01); H01L 29/1037 (2013.01); H01L 29/40117 (2019.08); H01L 29/4234 (2013.01); H01L 29/511 (2013.01); H01L 29/518 (2013.01); H10B 43/10 (2023.02); H10B 43/27 (2023.02); H01L 21/02252 (2013.01); H01L 21/02255 (2013.01);
Abstract

According to one embodiment, a semiconductor memory device includes a stacked body including a plurality of electrode members and a plurality of insulating members, each of the electrode members and each of the insulating members being stacked alternately in a first direction on the substrate. The semiconductor memory device also includes a memory hole that extends in the stacked body in the first direction and a semiconductor member that is disposed to extend in the memory hole in the first direction. The semiconductor memory device also includes a memory member that is disposed between the semiconductor member and the plurality of electrode members. The plurality of electrode members including a first electrode member and a second electrode member, a thickness of the memory member at the position of the first electrode member being greater than a thickness of the memory member at the position of the second electrode member.


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