The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 27, 2024

Filed:

May. 12, 2022
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventor:

Jung Wook Lim, Hwaseong-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04N 25/616 (2023.01); H04N 25/79 (2023.01); H04N 25/709 (2023.01); H04N 25/767 (2023.01); H04N 25/771 (2023.01); H01L 27/146 (2006.01); H04N 25/59 (2023.01);
U.S. Cl.
CPC ...
H04N 25/616 (2023.01); H04N 25/709 (2023.01); H04N 25/767 (2023.01); H04N 25/771 (2023.01); H04N 25/79 (2023.01); H01L 27/14603 (2013.01); H01L 27/14614 (2013.01); H01L 27/14643 (2013.01); H04N 25/59 (2023.01);
Abstract

An image sensor with improved image quality is provided. An image sensor includes a pixel array including a plurality of unit pixels. Each of the unit pixels includes a first photoelectric converter configured to convert received light into charges, a first transfer transistor electrically connected between the first photoelectric converter and a first node, a connection transistor disposed connected to a second node and the first node, a dual conversion transistor electrically connected between a third node and the second node, a second transfer transistor electrically connected between a fourth node and the third node, a second photoelectric converter electrically connected to the fourth node and configured to convert the received light into charges, a first switch electrically connected to the second photoelectric converter and the fourth node, a first capacitor electrically connected to the fourth node, and a electrically second capacitor connected to the third node.


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