The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 27, 2024

Filed:

Jan. 07, 2022
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Sai Aditya Krishnaswamy Nurani, Hyderabad, IN;

Joseph Palackal Mathew, Podimattom, IN;

Prasanth K, Ottapalam, IN;

Visvesvaraya Appala Pentakota, Bengaluru, IN;

Shagun Dusad, Bengaluru, IN;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/12 (2006.01); G11C 27/02 (2006.01);
U.S. Cl.
CPC ...
H03M 1/1245 (2013.01); G11C 27/02 (2013.01); H03M 1/121 (2013.01);
Abstract

An example sample-and-hold circuit includes a first and second input resistors, each having first and second terminals; first and second transistors coupled in series between the second terminals of the first and second input resistors; and third and fourth input resistors, each having first and second terminals; and third and fourth transistors coupled in series between the second terminals of the third and fourth input resistors. A first capacitor is coupled between the first and second transistors and a second capacitor is coupled between the third and fourth transistors. The control terminals of the first and third transistors are coupled together, and the control terminals of the second and fourth transistors are coupled together.


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