The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 27, 2024

Filed:

Mar. 22, 2022
Applicant:

Western Digital Technologies, Inc., San Jose, CA (US);

Inventors:

Ran Zamir, Ramat Gan, IL;

Idan Alrod, Herzliya, IL;

Eran Sharon, Rishon Lezion, IL;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01); H03M 7/30 (2006.01); H03M 7/40 (2006.01); H03M 7/42 (2006.01); G10L 19/00 (2013.01);
U.S. Cl.
CPC ...
G06F 3/0608 (2013.01); G06F 3/064 (2013.01); G06F 3/0679 (2013.01); H03M 7/3088 (2013.01); H03M 7/40 (2013.01); H03M 7/42 (2013.01); H03M 7/6011 (2013.01); H03M 7/6094 (2013.01); G10L 2019/0007 (2013.01);
Abstract

An apparatus includes a first encoder circuit configured to compress a block of data using dictionary based compression and a second encoder circuit connected to the first encoder circuit to receive the compressed block of data from the first encoder circuit. The second encoder circuit is configured to further compress the compressed block of data according to a codebook. The codebook is based on a distribution of data of a prior block of data or a distribution of data of a portion of the block of data that is less than the block of data. The operation of the second encoder circuit overlaps with the operation of the first encoder circuit to achieve high throughput and avoid the need for a large block of memory (e.g., SRAM) to occupy the data in flight until the second encoder circuit can start.


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