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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 11910695 B1

PDFFull Text
Date of Patent:
Feb. 20, 2024

Filed:

Aug. 19, 2021

Mask plate, display panel and display device

Applicants:

Chengdu Boe Optoelectronics Technology Co., Ltd., Sichuan, CN;

Boe Technology Group Co., Ltd., Beijing, CN;

Inventors:

Wenhui Gao, Beijing, CN;

Kai Zhang, Beijing, CN;

Erlong Song, Beijing, CN;

Lingran Wang, Beijing, CN;

Jianjie Liu, Beijing, CN;

Assignees:

Chengdu BOE Optoelectronics Technology Co., Ltd., Chengdu, CN;

BOE TECHNOLOGY GROUP CO., LTD., Beijing, CN;

Attorney:

Myers Bigel, P.A.

Primary Examiner:

Victoria K Hall

Int. Cl.
CPC ...
H01L 51/00 (2006.01); G03F 1/32 (2012.01); H01L 27/32 (2006.01); H01L 51/56 (2006.01); H10K 71/20 (2023.01); H10K 59/123 (2023.01); H10K 71/00 (2023.01); H10K 59/124 (2023.01); H10K 59/12 (2023.01);
U.S. Cl.
CPC ...
H10K 71/233 (2023.02); G03F 1/32 (2013.01); H10K 59/1201 (2023.02); H10K 59/123 (2023.02); H10K 59/124 (2023.02); H10K 71/00 (2023.02);
Abstract

The present disclosure provides a mask plate, a display panel and a display device. The mask plate comprises: a transparent substrate; an opaque film layer, the opaque film layer being disposed on the transparent substrate. The opaque film layer includes a plurality of first regions and a plurality of second regions, a first sub-region in the first region and the second region are transmissive, and the remaining portion in the first region is semi-transmissive. The mask plate is used to form via holes in the planarization layer of the display panel by exposure, so that the angles between the metal electrode layers disposed in the via holes and the source/drain layers of the display panel are small and diversified, decreasing the visibility of the metal electrode layers.

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