The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 20, 2024

Filed:

Feb. 27, 2020
Applicants:

Chengdu Boe Optoelectronics Technology Co., Ltd., Chengdu, CN;

Boe Technology Group Co., Ltd., Beijing, CN;

Inventors:

Yulong Wei, Beijing, CN;

Mengmeng Du, Beijing, CN;

Xiaoqing Shu, Beijing, CN;

Jiping Zhao, Beijing, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10K 59/131 (2023.01); H01L 27/12 (2006.01); G09G 3/3233 (2016.01);
U.S. Cl.
CPC ...
H10K 59/131 (2023.02); G09G 3/3233 (2013.01); H01L 27/124 (2013.01); G09G 2300/0426 (2013.01); G09G 2310/0264 (2013.01);
Abstract

A display substrate and a manufacturing method thereof, and a compensating method for wire load are provided. The display substrate includes a display region and a peripheral region. The display region has an opening, and the peripheral region includes an opening peripheral region at least partially in the opening; at least one wire is provided in the display region and the opening peripheral region. Each of the at least one wire includes two portions, a first portion is spaced apart and insulated from the semiconductor pattern and the conductive pattern, to provide at least one first compensation unit, and a second portion is spaced apart and insulated from one of the semiconductor pattern and the conductive pattern, to provide at least one second compensation unit.


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