The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 20, 2024
Filed:
Dec. 12, 2022
Applicant:
Advanced Micro Devices, Inc., Santa Clara, CA (US);
Inventors:
Andy Huei Chu, Saratoga, CA (US);
Karthik Gopalakrishnan, Cupertino, CA (US);
Pradeep Jayaraman, San Jose, CA (US);
Assignee:
Advanced Micro Devices, Inc., Santa Clara, CA (US);
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/081 (2006.01); H03L 7/189 (2006.01); H03L 7/087 (2006.01);
U.S. Cl.
CPC ...
H03L 7/0818 (2013.01); H03L 7/087 (2013.01); H03L 7/189 (2013.01);
Abstract
A clocking circuit is provided using a master delay-locked loop (DLL) and a slave DLL. A master DLL code indicates a delay adjustment made at a master DLL. A delay of a slave DLL is adjusted based on the master DLL code. A replica phase detector at the slave DLL is temporarily enabled during an interface idle period. A slave DLL code is determined, and a configuration value is determined based on the slave DLL code to the master DLL code. The replica phase detector is then disabled.