The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 20, 2024

Filed:

Jun. 17, 2022
Applicant:

Marvell Asia Pte Ltd, Singapore, SG;

Inventors:

Morteza Azarmnia, Irvine, CA (US);

Tomas Dusatko, North Vancouver, CA;

Fazil Ahmad, Irvine, CA (US);

Marco Garampazzi, Pavia, IT;

Assignee:

Marvell Asia Pte Ltd, Singapore, SG;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03B 5/18 (2006.01); G06F 1/10 (2006.01);
U.S. Cl.
CPC ...
H03B 5/1852 (2013.01); G06F 1/10 (2013.01);
Abstract

An integrated circuit transceiver device includes a plurality of functional circuits, and clock circuitry for distributing synchronous, in-phase, phase-locked clock signals to all transceiver circuits. The clock circuitry includes a frequency-controllable distributed oscillator including at least one coupled pair of transmission line oscillators having a respective oscillator core, and at least one respective transmission line segment. At least one impedance element couples the at least one respective transmission line segment of a first transmission line oscillator to the at least one respective transmission line segment of a second transmission line oscillator. Impedance of the impedance element is different from impedance of each respective transmission line segment to cause reflection at the at least one impedance element. At least one tap corresponding to each respective one of the transmission line oscillators outputs synchronous, in-phase, phase-locked clock signals for the functional circuits at points along the distributed oscillator.


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