The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 20, 2024
Filed:
Dec. 21, 2020
Applicant:
Samsung Electronics Co., Ltd., Suwon-si, KR;
Inventors:
Jiyoung Ahn, Seoul, KR;
Seunguk Han, Suwon-si, KR;
Sunghwan Kim, Yeongcheon-si, KR;
Seoryong Park, Ansan-si, KR;
Kiseok Lee, Seoul, KR;
Yoonyoung Choi, Seoul, KR;
Taehee Han, Hwaseong-si, KR;
Jiseok Hong, Suwon-si, KR;
Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/528 (2006.01); H01L 29/06 (2006.01); H10B 12/00 (2023.01); H01L 23/522 (2006.01); H01L 21/768 (2006.01); H01L 21/764 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5283 (2013.01); H01L 21/764 (2013.01); H01L 21/7682 (2013.01); H01L 29/0649 (2013.01); H10B 12/482 (2023.02); H10B 12/485 (2023.02); H10B 12/488 (2023.02); H01L 23/5222 (2013.01); H10B 12/0335 (2023.02); H10B 12/315 (2023.02); H10B 12/34 (2023.02);
Abstract
An integrated circuit device is provided. The integrated circuit device includes: a bit line on a substrate, the bit line including a lower conductive layer and an upper conductive layer; an insulating capping pattern on the bit line; and a main insulating spacer on a sidewall of the bit line and a sidewall of the insulating capping pattern, the main insulating spacer including an extended portion that is convex toward the upper conductive layer.