The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 20, 2024

Filed:

Mar. 22, 2021
Applicant:

Palo Alto Research Center Incorporated, Palo Alto, CA (US);

Inventors:

Christopher L. Chua, San Jose, CA (US);

Qian Wang, Mountain View, CA (US);

Yu Wang, Union City, CA (US);

Eugene M. Chow, Palo Alto, CA (US);

Assignee:

XEROX CORPORATION, Norwalk, CT (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/498 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49811 (2013.01); H01L 23/3157 (2013.01); H01L 24/66 (2013.01);
Abstract

An electronic assembly and methods of making the assembly are disclosed. The electronic assembly includes a substrate with an elastic member having an intrinsic stress profile. The elastic member has an anchor portion on the surface of the substrate; and a free end biased away from the substrate via the intrinsic stress profile to form an out of plane structure. The substrate includes one or more spacers on the substrate. The electronic assembly includes a chip comprising contact pads. The out of plane structure on the substrate touches corresponding contact pads on the chip, and the spacers on the substrate touch the chip forming a gap between the substrate and the chip.


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