The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 20, 2024

Filed:

Oct. 29, 2021
Applicant:

Inspur Suzhou Intelligent Technology Co., Ltd., Jiangsu, CN;

Inventors:

Fen Guo, Jiangsu, CN;

Kang Su, Jiangsu, CN;

Lang Zhou, Jiangsu, CN;

Tuo Li, Jiangsu, CN;

Hongtao Man, Jiangsu, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); H01L 21/683 (2006.01); H01L 21/768 (2006.01); H01L 21/78 (2006.01);
U.S. Cl.
CPC ...
H01L 21/0254 (2013.01); H01L 21/6835 (2013.01); H01L 21/7688 (2013.01); H01L 21/7806 (2013.01);
Abstract

The present application discloses a method, a system, a device, and a storage medium for fabricating a GaN chip. The method includes: growing a NbN sacrificial layer on an original substrate, and growing a GaN insertion layer on the NbN sacrificial layer; growing a TaN sacrificial layer on the GaN insertion layer, and growing a semiconductor layer on the TaN sacrificial layer to form a GaN wafer; bonding the GaN wafer with a first surface of a temporary carrier, and removing the NbN sacrificial layer and the TaN sacrificial layer; and transferring remaining material after removal of the NbN sacrificial layer and the TaN sacrificial layer to a target substrate, and removing the temporary carrier from the remaining material to form the GaN chip.


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