The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 20, 2024
Filed:
Aug. 27, 2021
Applicant:
Kioxia Corporation, Tokyo, JP;
Inventor:
Hideto Takekida, Nagoya Aichi, JP;
Assignee:
KIOXIA CORPORATION, Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/16 (2006.01); G11C 16/08 (2006.01); G11C 16/26 (2006.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01); G11C 16/10 (2006.01); H10B 43/10 (2023.01); H10B 43/20 (2023.01); H10B 43/35 (2023.01); H10B 43/40 (2023.01);
U.S. Cl.
CPC ...
G11C 16/08 (2013.01); G11C 16/10 (2013.01); G11C 16/26 (2013.01); H01L 23/5226 (2013.01); H01L 23/5283 (2013.01); H10B 43/10 (2023.02); H10B 43/20 (2023.02); H10B 43/35 (2023.02); H10B 43/40 (2023.02);
Abstract
According to one embodiment, a memory device includes a first chip and a second chip provided over the first chip. The first chip includes a first substrate, a first electrode, and a first memory cell array provided between the first substrate and the first electrode. The second chip includes a second substrate, a second electrode in contact with the first electrode, and a second memory cell array provided between the second substrate and the second electrode.