The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 20, 2024

Filed:

Jan. 25, 2023
Applicant:

Vmware Llc, Palo Alto, CA (US);

Inventors:

Marcos K. Aguilera, Mountain View, CA (US);

Keerthi Kumar, Bangalore, IN;

Pramod Kumar, Bangalore, IN;

Pratap Subrahmanyam, Saratoga, CA (US);

Sairam Veeraswamy, Coimbatore, IN;

Rajesh Venkatasubramanian, Palo Alto, CA (US);

Assignee:

VMware, Inc., Palo Alto, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 16/2453 (2019.01); G06F 16/22 (2019.01); G06F 16/2455 (2019.01); G06F 16/901 (2019.01); G06F 9/4401 (2018.01); G06F 9/50 (2006.01); H04L 67/10 (2022.01); G06F 3/06 (2006.01); G06F 12/0893 (2016.01); G06F 16/17 (2019.01); G06F 11/10 (2006.01); G06F 12/109 (2016.01); G06F 16/23 (2019.01); G06F 16/242 (2019.01); H03M 7/30 (2006.01); G06F 16/2457 (2019.01); G06F 16/2458 (2019.01); G06F 16/27 (2019.01); G06F 7/24 (2006.01); G06F 11/07 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1068 (2013.01); G06F 3/0619 (2013.01); G06F 3/0659 (2013.01); G06F 3/0673 (2013.01); G06F 11/0772 (2013.01);
Abstract

Disclosed are various embodiments for improving the resiliency and performance of clustered memory. A computing device can generate at least one parity page from at least a first local page and a second local page. The computing device can then submit a first write request for the first local page to a first one of a plurality of memory hosts. The computing device can also submit a second write request for the second local page to a second one of the plurality of memory hosts. Additionally, the computing device can submit a third write request for the parity page to a third one of the plurality of memory hosts.


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