The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 20, 2024

Filed:

Jul. 17, 2020
Applicant:

Nagravision Sarl, Cheseaux-sur-Lausanne, CH;

Inventors:

Jean-Marie Martin, Cheseaux-sur-Lausanne, CH;

Marco Macchetti, Cheseaux-sur-Lausanne, CH;

Assignee:

NAGRAVISION SARL, Cheseaux-sur-Lausanne, CH;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/3177 (2006.01); H04K 3/00 (2006.01);
U.S. Cl.
CPC ...
G01R 31/3177 (2013.01); H04K 3/28 (2013.01); H04K 3/43 (2013.01); H04K 3/60 (2013.01); H04K 3/825 (2013.01); H04K 3/94 (2013.01); H04K 3/41 (2013.01); H04K 3/45 (2013.01);
Abstract

Implementing a camouflage of current traces generated by a hardware component having one or more set of digital elements defining a plurality of operational datapaths comprises adjusting () one or more working condition(s) of the hardware component, measuring () a reaction of the hardware component to the working condition(s) by a logic test circuit through processing data operations along a reference datapath having a minimum duration corresponding to at least the longest of the operational datapaths, and in response to detecting an error () along the reference datapath, modifying () the working condition(s) so that the error generated by the logic test circuit is cancelled. Applications to countermeasures to side-channel attacks.


Find Patent Forward Citations

Loading…