The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 20, 2024
Filed:
Jun. 22, 2022
National Technology & Engineering Solutions of Sandia, Llc, Albuquerque, NM (US);
Michael Gehl, Edgewood, NM (US);
Christopher Todd DeRose, Albuquerque, NM (US);
Hayden James McGuinness, Albuquerque, NM (US);
Daniel Stick, Albuquerque, NM (US);
Randolph R. Kay, Albuquerque, NM (US);
Matthew G. Blain, Albuquerque, NM (US);
National Technology & Engineering Solutions of Sandia, LLC, Albuquerque, NM (US);
Abstract
A photonic integrated circuit and a method for its manufacture are provided. In an embodiment, an intermetal dielectric layer, for example, a silicon oxide layer, is contiguous between an upper metal layer and a lower metal layer on a substrate. One or more waveguides having top and bottom faces are formed in respective waveguide layers within the intermetal dielectric layer between the upper and lower metal layers. There is a distance of at least 600 nm from the upper metal layer to the top face of the uppermost of the several waveguides. There is a distance of at least 600 nm from the lower metal layer to the bottom face of the lowermost of the several waveguides. The waveguides are formed of silicon nitride for longer wavelengths and alumina for shorter wavelengths. These dimensions and materials are favorable for CMOS processing, among other things.