The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 13, 2024

Filed:

Jun. 23, 2020
Applicant:

Gree Electric Appliances, Inc. of Zhuhai, Qianshan Zhuhai, CN;

Inventors:

Daokun Chen, Zhuhai, CN;

Libo Ao, Zhuhai, CN;

Bo Shi, Zhuhai, CN;

Dan Zeng, Zhuhai, CN;

Jun Cao, Zhuhai, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/06 (2006.01); H01L 23/522 (2006.01); H02M 7/5387 (2007.01); H01L 23/528 (2006.01); H02M 7/00 (2006.01);
U.S. Cl.
CPC ...
H02M 7/53875 (2013.01); H01L 23/528 (2013.01); H01L 29/0642 (2013.01); H02M 7/003 (2013.01);
Abstract

The present disclosure relates to a field of chip technology, and discloses a three-phase inverter power chip and a preparation method therefor. The preparation method includes: forming active areas on a substrate and an isolation area located outside the active areas; forming a source electrode, a drain electrode and a gate electrode of a transistor in each active area; forming a first bond pad, second bond pads, third bond pads and fourth bond pads in the isolation area; the source electrode, the drain electrode and the gate electrode of the chip being extended to the first bond pad, the second bond pads, the third bond pads or the fourth bond pads corresponding thereto; and electrically connecting the source electrode, the drain electrode and the gate electrode of the transistor to the first bond pad, the second bond pads, the third bond pads or the fourth bond pads corresponding thereto.


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