The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 13, 2024

Filed:

Feb. 05, 2022
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Honglin Guo, Dallas, TX (US);

Zachary K Lee, Fremont, CA (US);

Jingjing Chen, Santa Clara, CA (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/94 (2006.01); H01L 29/66 (2006.01); H01L 21/265 (2006.01); H01L 29/40 (2006.01); H01L 21/266 (2006.01);
U.S. Cl.
CPC ...
H01L 29/94 (2013.01); H01L 29/66189 (2013.01); H01L 21/266 (2013.01); H01L 21/26513 (2013.01); H01L 21/26586 (2013.01); H01L 29/401 (2013.01);
Abstract

An integrated circuit includes an SOI substrate having a semiconductor layer over a buried insulator layer; the semiconductor layer contains white space regions that include a PWELL region. An electronic device includes an NWELL region in the semiconductor layer, a dielectric over the NWELL region, and a polysilicon plate over the dielectric. A sacrificial NWELL ring is adjacent to and separated from the NWELL region by a first gap.


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