The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 13, 2024

Filed:

Feb. 23, 2022
Applicant:

Rfhic Corporation, Anyang-si, KR;

Inventor:

Won Sang Lee, Chapel Hill, NC (US);

Assignee:

RFHIC Corporation, Anyang-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); H01L 29/20 (2006.01); H01L 21/768 (2006.01); H01L 29/205 (2006.01); H01L 29/267 (2006.01); H01L 29/66 (2006.01); H01L 29/16 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 29/2003 (2013.01); H01L 21/0254 (2013.01); H01L 21/02378 (2013.01); H01L 21/02488 (2013.01); H01L 21/02527 (2013.01); H01L 21/76871 (2013.01); H01L 21/76897 (2013.01); H01L 24/94 (2013.01); H01L 29/1602 (2013.01); H01L 29/205 (2013.01); H01L 29/267 (2013.01); H01L 29/66462 (2013.01);
Abstract

Wafers including a diamond layer and a semiconductor layer having III-Nitride compounds and methods for fabricating the wafers are provided. A nucleation layer, at least one semiconductor layer having III-Nitride compound and a protection layer are formed on a silicon substrate. Then, a silicon carrier wafer is glass bonded to the protection layer. Subsequently the silicon substrate, nucleation layer and a portion of the semiconductor layer are removed. Then, an intermediate layer, a seed layer and a diamond layer are sequentially deposited on the III-Nitride layer. Next, a substrate wafer that includes a glass substrate (or a silicon substrate covered by a protection layer) is glass bonded to the diamond layer. Then, the silicon carrier wafer and the protection layer are removed.


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