The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 13, 2024

Filed:

Dec. 13, 2021
Applicant:

Kioxia Corporation, Tokyo, JP;

Inventors:

Mutsumi Okajima, Yokkaichi Mie, JP;

Mamoru Ishizaka, Hiratsuka Kanagawa, JP;

Assignee:

Kioxia Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/4091 (2006.01); G11C 5/02 (2006.01); H01L 23/48 (2006.01);
U.S. Cl.
CPC ...
G11C 11/4091 (2013.01); G11C 5/025 (2013.01); H01L 23/481 (2013.01);
Abstract

A semiconductor memory device includes: memory units arranged in a first direction; first semiconductor layers arranged in the first direction and electrically connected to the memory units; first gate electrodes arranged in the first direction and opposed to the first semiconductor layers; a first wiring extending in the first direction and connected to the first semiconductor layers; second wirings arranged in the first direction, and connected to the first gate electrodes; second semiconductor layers arranged in the first direction and disposed at first end portions of the second wirings; second gate electrodes arranged in the first direction and opposed to the second semiconductor layers; third semiconductor layers arranged in the first direction and disposed at second end portions of the second wirings; and third gate electrodes arranged in the first direction and opposed to the third semiconductor layers.


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