The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 13, 2024

Filed:

Sep. 29, 2021
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Dung Q. Nguyen, Austin, TX (US);

Brian W. Thompto, Austin, TX (US);

Jose E. Moreira, Irvington, NY (US);

Jessica Hui-Chun Tseng, Fremont, CA (US);

Pratap C. Pattnaik, Yorktown Heights, NY (US);

Kattamuri Ekanadham, Mohegan Lake, NY (US);

Manoj Kumar, Yorktown Heights, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/30 (2018.01); G06F 9/38 (2018.01);
U.S. Cl.
CPC ...
G06F 9/30145 (2013.01); G06F 9/30036 (2013.01); G06F 9/30109 (2013.01); G06F 9/3836 (2013.01); G06F 9/3869 (2013.01);
Abstract

A system may determine that two instructions may be combined based on a processing power of the processor and a size of the instructions, fuse the two instructions into a pair, map the two instructions with a single register tag, write the register tag into a mapper with bits indicating that the register tag is for a first instruction of the two instructions, write the register tag into the mapper with bits indicating that the register tag is for a second instruction of the two instructions, write the fused instruction pair into an issue queue, issue the fused instruction pair to a vector-scalar transformation units (VSU), and execute the two instructions.


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