The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 13, 2024

Filed:

Mar. 03, 2022
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Venkateswar Kowkutla, Allen, TX (US);

Raghavendra Santhanagopal, Dallas, TX (US);

Chunhua Hu, Plano, TX (US);

Anthony Frederick Seely, Wylie, TX (US);

Nishanth Menon, Plano, TX (US);

Rajesh Kumar Vanga, Bangalore, IN;

Rejitha Nair, Southlake, TX (US);

Siva Srinivas Kothamasu, Frisco, TX (US);

Kazunobu Shin, Plano, TX (US);

Jason Peck, Sugar Land, TX (US);

John Apostol, Richardson, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/10 (2006.01); G06F 11/36 (2006.01); G06F 9/4401 (2018.01); G06F 11/30 (2006.01);
U.S. Cl.
CPC ...
G06F 11/3656 (2013.01); G06F 9/4401 (2013.01); G06F 11/3048 (2013.01); G06F 13/102 (2013.01); G06F 2201/86 (2013.01); G06F 2213/0038 (2013.01);
Abstract

A system on a chip (SoC) includes a first domain comprising a first processor configured to boot the SoC, and a first debug subsystem, a second domain comprising a second processor, the second domain configurable as either a safety domain or a general-purpose processing domain, and isolation circuitry between the first domain and the second domain. During boot-up of the SoC, the first processor provides code to the second domain which, when executed by the second processor, configures the second domain as either a safety domain or as a general-purpose processing domain.


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