The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 13, 2024

Filed:

Jun. 14, 2021
Applicant:

Apple Inc., Cupertino, CA (US);

Inventors:

Fabien S. Faure, Santa Clara, CA (US);

Si Chen, Fremont, CA (US);

Mansour Keramat, Los Gatos, CA (US);

Arnaud J. Forestier, San Diego, CA (US);

Assignee:

Apple Inc., Cupertino, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G08B 21/00 (2006.01); G01R 31/317 (2006.01); H03M 1/12 (2006.01); G01R 13/02 (2006.01); G06F 11/10 (2006.01); G01R 19/25 (2006.01);
U.S. Cl.
CPC ...
G01R 31/31713 (2013.01); G01R 13/029 (2013.01); G01R 13/0272 (2013.01); G01R 19/2503 (2013.01); G01R 31/31705 (2013.01); G06F 11/10 (2013.01); H03M 1/12 (2013.01);
Abstract

A voltage monitoring circuit is disclosed. An apparatus includes a first physical interface circuit and a real-time oscilloscope circuit configured to monitor a first voltage provided to the first physical interface circuit. The real-time oscilloscope is configured to receive an indication that an error was detected in data transmitted from the first physical interface to a second physical interface circuit. The real-time oscilloscope is further configured to provide for debug, to a host computer external to the first interface, information indicating a state of the first voltage at a time at which the error was detected.


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