The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 06, 2024

Filed:

Jun. 11, 2021
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Changyeon Yu, Hwaseong-si, KR;

Pansuk Kwak, Goyang-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/04 (2006.01); H10B 43/40 (2023.01); H01L 21/66 (2006.01); H01L 23/535 (2006.01); H10B 41/27 (2023.01); H10B 41/41 (2023.01); H10B 43/27 (2023.01); G11C 16/24 (2006.01);
U.S. Cl.
CPC ...
H10B 43/40 (2023.02); H01L 22/34 (2013.01); H01L 23/535 (2013.01); H10B 41/27 (2023.02); H10B 41/41 (2023.02); H10B 43/27 (2023.02); G11C 16/0483 (2013.01); G11C 16/24 (2013.01);
Abstract

A nonvolatile memory device having a cell over periphery (COP) structure includes a first sub memory plane and a second sub memory plane disposed adjacent to the first sub memory plane a row direction. A first vertical contact region is disposed in the cell region of the first sub memory plane and a second vertical contact region is disposed in the cell region of the second sub memory plane. A first overhead region is disposed in the cell region of the first sub memory plane and adjacent to the second vertical region in the row direction, and a second overhead region is disposed in the cell region of the second sub memory plane and adjacent to the first vertical region in the row direction. Cell channel structures are disposed in a main region of the cell region.


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