The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 06, 2024

Filed:

May. 05, 2022
Applicant:

Psemi Corporation, San Diego, CA (US);

Inventors:

Rong Jiang, San Diego, CA (US);

Haopei Deng, San Diego, CA (US);

Assignee:

pSemi Corporation, San Diego, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03F 1/02 (2006.01); H03F 1/22 (2006.01); H03F 1/56 (2006.01); H03G 3/30 (2006.01); H03F 3/195 (2006.01); H03F 3/02 (2006.01); H03F 1/32 (2006.01);
U.S. Cl.
CPC ...
H03F 1/223 (2013.01); H03F 1/3205 (2013.01); H03F 1/565 (2013.01); H03F 3/02 (2013.01); H03F 3/195 (2013.01); H03G 3/3042 (2013.01);
Abstract

Methods and devices for amplifying an input RF signal according to at least two gain-states is described. According to one aspect, a multi gain amplifier circuit including a low noise amplifier having a stack of transistors is used for amplification of the input RF signal. When switching from a low gain-state to a high gain-state, the drain-to-source voltage of the output transistor of the stack is increased to affect region of operation of the output transistor, and thereby reduce non-linearity at the output of the amplifier. When switching from the high gain-state to the low gain-state, the drain-to-source voltage of the input transistor of the stack is increased to affect region of operation of the input transistor, and thereby reduce non-linearity at the output of the amplifier.


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