The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 06, 2024
Filed:
Jan. 30, 2020
Hitachi Astemo, Ltd., Hitachinaka, JP;
Hironori Nagasaki, Tokyo, JP;
Toru Kato, Hitachinaka, JP;
Takashi Hirao, Tokyo, JP;
Shintaro Tanaka, Tokyo, JP;
Hitachi Astemo, Ltd., Hitachinaka, JP;
Abstract
A power semiconductor device includes a first submodule including a first power semiconductor element, a second submodule including a second power semiconductor element, a positive electrode side conductor portion and a negative electrode side conductor portion, an intermediate substrate that forms a negative electrode side facing portion facing the negative electrode side conductor portion with the first submodule sandwiched between them and a positive electrode side facing portion facing the positive electrode side conductor portion with the second submodule sandwiched between them, and a plurality of signal terminals that transmit a signal for controlling the first power semiconductor element or the second power semiconductor element. The second submodule is disposed such that directions of an electrode surface of the second power semiconductor element and an electrode surface of the first power semiconductor element are inverted, a signal relay conductor portion is disposed in a space sandwiched between a part of the second submodule and the intermediate substrate in a height direction of the second submodule, and the intermediate substrate has a wire connected to the signal relay conductor portion and electrically connected to the signal terminal. In this manner, productivity of the power semiconductor device is improved while an increase in main circuit inductance is suppressed.