The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 06, 2024

Filed:

Oct. 06, 2021
Applicant:

Aphrosys Co.,ltd., Anyang-si, KR;

Inventors:

Bu Young Kim, Seoul, KR;

Sang Heon Lee, Goyang-si, KR;

Wang Kook Im, Suwon-si, KR;

Sung Hwan Park, Incheon, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/66 (2006.01);
U.S. Cl.
CPC ...
H01L 22/12 (2013.01); H01L 22/26 (2013.01);
Abstract

Disclosed is a method for producing a wafer map. More specifically, the present invention relates to: a method for producing a wafer map used for manufacturing chips in the semiconductor field, wherein a geographic information system (GIS) technique is used to produce the wafer map; and a method and system for providing wafer test results using same. According to an embodiment of the present invention, a semiconductor wafer is formed as a map by using the GIS technique, a coordinate system used in the GIS is utilized to create a map of the same size as an actual semiconductor wafer, and each of various constituent elements constituting the wafer can be stratified to reflect the actual size of the element to create a wafer map in which each of the elements is geocoded.


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