The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 06, 2024
Filed:
Oct. 22, 2021
Applicant:
Tesla, Inc., Austin, TX (US);
Inventors:
Emil Talpes, San Mateo, CA (US);
Peter Joseph Bannon, Woodside, CA (US);
Kevin Altair Hurd, Redwood City, CA (US);
Assignee:
Tesla, Inc., Austin, TX (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 9/38 (2018.01); G06F 13/16 (2006.01); G06F 17/16 (2006.01); G06F 3/06 (2006.01); G06F 15/80 (2006.01);
U.S. Cl.
CPC ...
G06F 9/3887 (2013.01); G06F 3/0613 (2013.01); G06F 3/0631 (2013.01); G06F 9/3824 (2013.01); G06F 13/1642 (2013.01); G06F 13/1663 (2013.01); G06F 13/1689 (2013.01); G06F 15/8007 (2013.01); G06F 17/16 (2013.01);
Abstract
A microprocessor system comprises a computational array and a hardware arbiter. The computational array includes a plurality of computation units. Each of the plurality of computation units operates on a corresponding value addressed from memory. The hardware arbiter is configured to control issuing of at least one memory request for one or more of the corresponding values addressed from the memory for the computation units. The hardware arbiter is also configured to schedule a control signal to be issued based on the issuing of the memory requests.