The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 06, 2024

Filed:

Feb. 20, 2021
Applicant:

Western Digital Technologies, Inc., San Jose, CA (US);

Inventor:

David R. Hall, Rochester, MN (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01); G06F 12/08 (2016.01); G06F 12/0868 (2016.01); G11B 5/012 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0659 (2013.01); G06F 3/068 (2013.01); G06F 3/0616 (2013.01); G06F 3/0625 (2013.01); G06F 3/0674 (2013.01); G06F 12/0868 (2013.01); G11B 5/012 (2013.01); G06F 2212/1032 (2013.01);
Abstract

A data storage device is disclosed comprising a head actuated over a disk, a first semiconductor memory (SM) having a first endurance, and a second SM having a second endurance lower than the first endurance. A write command is received from a host including write data. When a size of the write command is less than a threshold, the write data is stored in a first SM write cache in the first SM, and when the size of the write command is greater than the threshold, the write data is stored in a second SM write cache in the second SM.


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Quick Actions:

Hall, David. (2024). Data storage device managing low endurance semiconductor memory write cache (U.S. Patent No. 11893277). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11893277

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