The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 06, 2024
Filed:
May. 10, 2022
Applicant:
Microchip Technology Inc., Chandler, AZ (US);
Inventors:
Sanjay Goyal, Roseville, CA (US);
Larrie Simon Carr, Kelowna, CA;
Patrick Bailey, Port Coquitlam, CA;
Assignee:
Microchip Technology Inc., Chandler, AZ (US);
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/16 (2006.01); G06F 11/10 (2006.01); G06F 13/42 (2006.01);
U.S. Cl.
CPC ...
G06F 13/1621 (2013.01); G06F 11/1004 (2013.01); G06F 13/1668 (2013.01); G06F 13/4221 (2013.01);
Abstract
System and method for analyzing CXL flits at read bypass detection logic to identify bypass memory read requests and transmitting the identified bypass memory read requests over a read request bypass path directly to a transaction/application layer of the CXL memory controller, wherein the read request bypass path does not include an arbitration/multiplexing layer and a link layer of the CXL memory controller, thereby reducing the latency inherent in a CXL memory controller.