Transistor and method of fabrication of the same including a gate contact formed in a recess through the passivation dielectric layer in contact with the active layer

Abstract

The present invention relates to a gate structure and a method for its production. In particular, the present invention relates to agate structuring of a field effect transistor (FET), wherein the field effect transistor with the same active layer can be constructed as a depletion type, or D-type, as an enhancement type, or E-type, and as a low noise type, or LN-type, on a shared substrate base using a uniform method. The gate structure according to the invention comprises a substrate; a piezoelectric active layer () disposed on the substrate (); a passivation layer () disposed on the active layer (), wherein the passivation layer () has a recess () that extends through the entire passivation layer () in the direction of the active layer (); a contact element () disposed within the recess (), wherein the contact element () extends from the active layer () to above the passivation layer (); and a cover layer () that covers the contact element () above the passivation layer (); wherein at least one layer disposed above the active layer is tensile stressed or compressively stressed in the area around the contact element, with a normal tension of |σ|>200 MPa, wherein via the individual stresses in the area around the contact element, a resulting force on the boundary area between the passivation layer and the active layer is set, which influences via the piezoelectric effect the electron density in the active layer in the area below the contact element.