The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 30, 2024

Filed:

Mar. 02, 2021
Applicant:

Kioxia Corporation, Tokyo, JP;

Inventors:

Yasuhito Yoshimizu, Yokkaichi Mie, JP;

Hiroshi Nakaki, Yokkaichi Mie, JP;

Kazuaki Nakajima, Yokkaichi Mie, JP;

Assignee:

Kioxia Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10B 43/35 (2023.01); H01L 23/00 (2006.01); H10B 41/10 (2023.01); H10B 41/20 (2023.01); H10B 41/35 (2023.01); H10B 43/10 (2023.01); H10B 43/20 (2023.01);
U.S. Cl.
CPC ...
H10B 43/35 (2023.02); H01L 24/46 (2013.01); H10B 41/10 (2023.02); H10B 41/20 (2023.02); H10B 41/35 (2023.02); H10B 43/10 (2023.02); H10B 43/20 (2023.02);
Abstract

A semiconductor storage device includes first wiring layers stacked along a first direction, a first pillar including a first semiconductor layer and extending along the first direction through the first wiring layers, a second wiring layer disposed above the first pillar in the first direction and extending along a second direction perpendicular to the first direction, a semiconductor-containing layer including a first portion disposed on an upper end of the first pillar in the first direction, a second portion contacting the first portion and formed along the second wiring layer, and a third portion contacting an upper end of the second portion and extending along a third direction perpendicular to the first direction and crossing the second direction, and a first insulating layer between each of the first and second portions of the semiconductor-containing layer and the second wiring layer. An upper surface of the third portion contains a metal.


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