The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 30, 2024

Filed:

Oct. 25, 2021
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Chang-Sun Hwang, Hwaseong-si, KR;

Gihwan Kim, Suwon-si, KR;

Chungki Min, Hwaseong-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/11556 (2017.01); H10B 41/27 (2023.01); H01L 29/66 (2006.01); G11C 5/02 (2006.01); H01L 25/07 (2006.01); G11C 5/06 (2006.01); H10B 43/27 (2023.01);
U.S. Cl.
CPC ...
H10B 41/27 (2023.02); G11C 5/025 (2013.01); G11C 5/06 (2013.01); H01L 25/074 (2013.01); H01L 29/66666 (2013.01); H10B 43/27 (2023.02);
Abstract

A semiconductor device include; a substrate including a cell array region and a key region, a stack structure on the cell array region including vertically stacked electrodes, a dummy structure on the key region, a vertical channel structure penetrating the stack structure to connect the substrate, a dummy pillar penetrating the first dummy structure, an interlayer dielectric layer on the stack structure and the dummy structure, wherein an upper portion of the interlayer dielectric layer on the dummy structure includes a key pattern that vertically overlaps the dummy pillar, and a capping layer on the key region and covering the key pattern.


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