The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 30, 2024

Filed:

Nov. 30, 2022
Applicant:

Realtek Semiconductor Corp., Hsinchu, TW;

Inventors:

Tsung-Han Tsai, Hsinchu, TW;

Peng-Fei Lin, Hsinchu, TW;

Kuo-Wei Chi, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 5/135 (2006.01); G06F 1/08 (2006.01); H03K 5/131 (2014.01); H03K 5/00 (2006.01);
U.S. Cl.
CPC ...
H03K 5/135 (2013.01); G06F 1/08 (2013.01); H03K 5/131 (2013.01); H03K 2005/00058 (2013.01);
Abstract

A phase interpolation device and a multi-phase clock generation device are provided. The phase interpolation device includes a digital controller circuit and a phase interpolator that includes a capacitor and circuit branches, which are controlled by the digital controller circuit to generate an n-th phase clock of N phase clocks between first and second input clocks. When the n-th phase clock is generated, the digital controller circuit controls, in response to appearances of rising edges of the first input clock, the circuit branches to charge the capacitor using (N−n+1)×M ones of the first current source, and controls, in response to appearances of rising edges of the second input clock, the circuit branches to use N×M ones of the first current source to charge the capacitor. N, M, n are integers.


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