The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 30, 2024
Filed:
Jun. 28, 2021
Applicant:
Texas Instruments Incorporated, Dallas, TX (US);
Inventors:
Peter John Holverson, Dallas, TX (US);
Sudtida Lavangkul, Murphy, TX (US);
Assignee:
TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US);
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); H01L 23/532 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76873 (2013.01); H01L 21/76814 (2013.01); H01L 21/76843 (2013.01); H01L 21/76853 (2013.01); H01L 23/53238 (2013.01);
Abstract
Methods of forming metal interconnections of an integrated circuit include electroplating two or more metal layers over a metal seed layer, rinsing each of the metal layers with deionized water after the electroplating, and drying each of the metal layers after the rinsing. After forming a last metal layer, the two or more metal layers are annealed thereby forming a final metal layer, resulting in a low defect density of the final metal layer.