The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 30, 2024
Filed:
Jul. 07, 2021
Applicant:
Xilinx, Inc., San Jose, CA (US);
Inventors:
Ayush Khemka, San Jose, CA (US);
Srinivas Beeravolu, Los Gatos, CA (US);
Kalyani Tummala, San Jose, CA (US);
Jaipal Reddy Nareddy, Hyderabad, IN;
Adithya Balaji Boda, Hyderabad, IN;
Suman Kumar Timmireddy, Hyderabad, IN;
Assignee:
Xilinx, Inc., San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 30/392 (2020.01); G06F 30/398 (2020.01); G06F 111/20 (2020.01);
U.S. Cl.
CPC ...
G06F 30/392 (2020.01); G06F 30/398 (2020.01); G06F 2111/20 (2020.01);
Abstract
Circuit design development using block design containers can include opening, within a development environment generated by an Electronic Design Automation (EDA) system, a top-level block design specifying a circuit design and inserting, within the top-level block design using the EDA system, a block design container. The block design container specifies a source block design used as a sub-design within the top-level block design.