The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 30, 2024
Filed:
Dec. 08, 2020
Fuzhou University, Fujian, CN;
Abstract
The invention relates to the technical field of computer-aided design of integrated circuits, and provides a two-step X-architecture Steiner minimum tree construction method for very large scale integration (VLSI). Based on the advantages of an X-architecture model and a particle swarm optimization technique, the method is implemented through two steps: (1) the stage of social learning discrete particle swarm search, which comprises: using an edge-vertex encoding strategy capable of maintaining optimal topological information of particles, designing a fitness function taking wirelength into consideration; and using a chaotic decreasing mutation strategy and a new social learning strategy to design a new discrete particle swarm update formula; and (2) a stage of wirelength optimization, which comprises: designing a local topological optimization strategy to minimize the wirelength of an X-architecture Steiner tree. The method guarantees short total wirelength of nets and has high stability, thus being able to construct a high-quality X-architecture Steiner minimum tree.