The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 30, 2024

Filed:

May. 03, 2021
Applicant:

Nvidia Corporation, Santa Clara, CA (US);

Inventors:

Sau Yan Keith Li, San Jose, CA (US);

Thomas E. Dewey, Menlo Park, CA (US);

Arthur Chen, Sunnyvale, CA (US);

Simon Lai, Mountain View, CA (US);

Amit Pabalkar, Fremont, CA (US);

Santosh Nayak, San Jose, CA (US);

Assignee:

NVIDIA Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/00 (2006.01); G06F 1/26 (2006.01); G06F 9/4401 (2018.01); G06F 1/08 (2006.01);
U.S. Cl.
CPC ...
G06F 1/26 (2013.01); G06F 1/08 (2013.01); G06F 9/4411 (2013.01);
Abstract

A method for managing power in a multiple processor computing device includes detecting a first amount of power being used by a first processor of the computing device; determining an amount of extra power available based on the first amount of power and a power budget for the first processor; and transmits a value to a driver associated with a second processor of the computing device, wherein the value indicates the amount of extra power available, wherein the driver adjusts at least one operating parameter of the second processor based on the amount of extra power available.


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