The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 30, 2024
Filed:
Feb. 23, 2022
Applicant:
Stmicroelectronics S.r.l., Agrate Brianza, IT;
Inventors:
Gaudenzia Bagnati, Pogliano Milanese, IT;
Stefano Castorina, Milan, IT;
Valerio Bendotti, Vilminore di Scalve, IT;
Assignee:
STMICROELECTRONICS S.R.L., Agrate Brianza, IT;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 31/02 (2006.01); H03K 17/687 (2006.01); H03K 5/24 (2006.01); G01R 31/54 (2020.01); G01R 19/165 (2006.01); G01R 31/28 (2006.01);
U.S. Cl.
CPC ...
G01R 31/2851 (2013.01); G01R 19/16571 (2013.01); G01R 31/54 (2020.01); H03K 5/24 (2013.01); H03K 17/6874 (2013.01); H03K 2217/0063 (2013.01); H03K 2217/0072 (2013.01);
Abstract
An integrated circuit includes a plurality of power transistor driver channels for driving external loads. The driver channels can be selectively configured as high-side (HS) or low-side (LS) driver channels. The integrated circuit includes, for each driver channel, a respective on-state test circuit and a respective controller. The on-state test circuits can be selectively configured to test for HS overcurrent conditions, LS overcurrent conditions, HS open load conditions, and LS open load conditions.