The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 23, 2024
Filed:
May. 09, 2022
Realtek Semiconductor Corp., HsinChu, TW;
Yu-Che Yang, HsinChu, TW;
Realtek Semiconductor Corp., HsinChu, TW;
Abstract
An all-digital phase-locked loop (ADPLL) and a calibration method thereof are provided. The ADPLL includes a digitally controlled oscillator (DCO), a time-to-digital converter (TDC) coupled to the DCO, and a normalization circuit coupled to the TDC. The DCO is configured to generate a clock signal according to a frequency control signal. The TDC is configured to generate a digital output signal according to a phase error between the clock signal and a reference signal. The normalization circuit is configured to convert the digital output signal into a clock phase value according to a gain parameter. More particularly, the normalization circuit may modify the gain parameter according to a phase error value between the clock phase value and a reference phase value.