The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 23, 2024
Filed:
Nov. 04, 2021
Applicant:
Infineon Technologies Ag, Neubiberg, DE;
Inventors:
Ralf Siemieniec, Villach, AT;
Thomas Aichinger, Faak am See, AT;
Romain Esteve, Prisdorf, DE;
Ravi Keshav Joshi, Klagenfurt, AT;
Shiqin Niu, Freising, DE;
Assignee:
Infineon Technologies AG, Neubiberg, DE;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/16 (2006.01); H01L 29/66 (2006.01); H01L 29/423 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 29/1608 (2013.01); H01L 29/4236 (2013.01); H01L 29/66068 (2013.01); H01L 29/66348 (2013.01); H01L 29/66666 (2013.01); H01L 29/7802 (2013.01); H01L 29/7813 (2013.01); H01L 29/7827 (2013.01); H01L 29/7828 (2013.01);
Abstract
A method includes providing a silicon carbide substrate, wherein a gate trench extends from a main surface of the silicon carbide substrate into the silicon carbide substrate and wherein a gate dielectric is formed on at least one sidewall of the gate trench, and forming a gate electrode in the gate trench, the gate electrode including a metal structure and a semiconductor layer between the metal structure and the gate dielectric.