The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 23, 2024

Filed:

Apr. 27, 2022
Applicant:

Nvidia Corp., Santa Clara, CA (US);

Inventors:

Jiwang Lee, San Jose, CA (US);

Jaewon Lee, Santa Clara, CA (US);

Hsuche Nee, Zhubei, TW;

Po-Chien Chiang, Hsinchu, TW;

Wen-Hung Lo, Saratoga, CA (US);

Abhishek Dhir, Mississauga, CA;

Michael Ivan Halfen, San Francisco, CA (US);

Chunjen Su, Zhubei, TW;

Assignee:

NVIDIA CORP., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/40 (2006.01); G11C 11/4093 (2006.01); H03K 17/687 (2006.01);
U.S. Cl.
CPC ...
G11C 11/4093 (2013.01); H03K 17/6874 (2013.01);
Abstract

A multi-rank circuit system utilizing a shared IO channel includes a first stage of multiple selectors coupled to input multiple digital busses, and a second stage including one or more selectors coupled to receive outputs of the first stage of selectors and to individually select one of the outputs of the first stage of selectors to one or more control circuits for IO circuits of the ranks. The system switches one of the ranks to be an active rank on the shared IO channel, and operates the first stage of selectors to select one of the digital busses to the second stage of selectors in advance of switching a next active rank to the shared IO channel.


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