The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 23, 2024

Filed:

Nov. 08, 2021
Applicant:

SK Hynix Inc., Icheon-si Gyeonggi-do, KR;

Inventors:

Jeong Jin Hwang, Icheon-si Gyeonggi-do, KR;

Sung Nyou Yu, Icheon-si Gyeonggi-do, KR;

Duck Hwa Hong, Icheon-si Gyeonggi-do, KR;

Sang Ah Hyun, Icheon-si Gyeonggi-do, KR;

Soo Hwan Kim, Icheon-si Gyeonggi-do, KR;

Assignee:

SK hynix Inc., Icheon-si Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/406 (2006.01); G11C 11/408 (2006.01);
U.S. Cl.
CPC ...
G11C 11/40615 (2013.01); G11C 11/4085 (2013.01); G11C 11/40603 (2013.01); G11C 11/406 (2013.01); G11C 11/40618 (2013.01);
Abstract

An electronic device includes a target address generation circuit configured to generate a counting signal by counting the number of times each logic level combination of an address is input by performing an internal read operation and an internal write operation during an active operation, configured to store the counting signal as the storage counting signal when the counting signal is counted more than a storage counting signal that is stored therein, and configured to store the address, corresponding to the counting signal, as a target address; and a refresh control circuit configured to control a smart refresh operation on the target address.


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