The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 23, 2024
Filed:
Nov. 29, 2021
Applicant:
SK Hynix Inc., Icheon-si, KR;
Inventor:
Jung Ho Lim, Icheon-si, KR;
Assignee:
SK hynix Inc., Icheon-si, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/406 (2006.01);
U.S. Cl.
CPC ...
G11C 11/406 (2013.01);
Abstract
A semiconductor memory apparatus includes an address generation circuit and an operation determination circuit. The address generation circuit generates a refresh target address that corresponds to a word line, among a plurality of word lines, the word line being adjacent to another word line in which row hammering has occurred. The operation determination circuit configured to generate an address matching information by comparing a row hammering address with the refresh target address.
Lim, Jung. (2024). Semiconductor memory apparatus including address generation circuit, row hammer detection circuit and operation determination circuit operating to ensure a stable refresh operation against row hammering (U.S. Patent No. 11881244). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11881244
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile