The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 23, 2024

Filed:

Jan. 07, 2022
Applicant:

Imagination Technologies Limited, Kings Langley, GB;

Inventors:

Steven J. Clohset, San Francisco, CA (US);

Jason R. Redgrave, Mountain View, CA (US);

Luke T. Peterson, San Francisco, CA (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06T 15/00 (2011.01); G06F 12/0804 (2016.01); G06T 15/06 (2011.01); G06T 17/10 (2006.01); G06T 5/00 (2006.01); G06T 1/60 (2006.01); G06F 12/0862 (2016.01); G06F 12/126 (2016.01);
U.S. Cl.
CPC ...
G06T 5/005 (2013.01); G06F 12/0804 (2013.01); G06T 1/60 (2013.01); G06T 15/06 (2013.01); G06T 17/10 (2013.01); G06F 12/0862 (2013.01); G06F 12/126 (2013.01); G06F 2212/1024 (2013.01); G06F 2212/302 (2013.01); G06F 2212/452 (2013.01); G06F 2212/455 (2013.01);
Abstract

In an aspect, an update unit can evaluate condition(s) in an update request and update one or more memory locations based on the condition evaluation. The update unit can operate atomically to determine whether to effect the update and to make the update. Updates can include one or more of incrementing and swapping values. An update request may specify one of a pre-determined set of update types. Some update types may be conditional and others unconditional. The update unit can be coupled to receive update requests from a plurality of computation units. The computation units may not have privileges to directly generate write requests to be effected on at least some of the locations in memory. The computation units can be fixed function circuitry operating on inputs received from programmable computation elements. The update unit may include a buffer to hold received update requests.


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