The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 16, 2024

Filed:

May. 24, 2022
Applicant:

Nanya Technology Corporation, New Taipei, TW;

Inventors:

Jr-Chiuan Wang, New Taipei, TW;

Rou-Wei Wang, Taipei, TW;

Wei-Yu Chen, Houlong Twonship, Miaoli County, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 12/00 (2023.01);
U.S. Cl.
CPC ...
H10B 12/482 (2023.02); H10B 12/0335 (2023.02); H10B 12/053 (2023.02); H10B 12/31 (2023.02); H10B 12/34 (2023.02); H10B 12/485 (2023.02); H10B 12/50 (2023.02);
Abstract

The present disclosure provides a semiconductor memory device. The semiconductor memory device comprises a substrate, which includes a storage area and a peripheral area, wherein the storage area has a contact plug, a bit line structure adjacent to the contact plug, an air gap between the bit line structure and the contact plug, a barrier layer conformally overlaying the bit line structure, and a landing pad above the barrier layer, wherein the substrate includes a trench between the storage area and the peripheral area, the trench is filled with a nitride material, and the substrate further comprises a first oxide layer above the nitride material in the trench and on the landing pad, a nitride layer above the first oxide layer, and a second layer above the nitride layer.


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