The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 16, 2024

Filed:

Jan. 11, 2023
Applicant:

Sony Semiconductor Solutions Corporation, Kanagawa, JP;

Inventors:

Kenta Nojima, Kumamoto, JP;

Kenju Nishikido, Kumamoto, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04N 25/70 (2023.01); H01L 27/146 (2006.01); H04N 25/76 (2023.01);
U.S. Cl.
CPC ...
H04N 25/70 (2023.01); H01L 27/14605 (2013.01); H01L 27/14607 (2013.01); H01L 27/14621 (2013.01); H01L 27/14623 (2013.01); H01L 27/14627 (2013.01); H01L 27/14685 (2013.01); H04N 25/76 (2023.01); H01L 27/1464 (2013.01); H01L 27/14643 (2013.01);
Abstract

The deterioration of light condensing characteristics of an overall solid-state imaging device resulting from providing in-layer lenses is suppressed while preventing the deterioration of device characteristics of the solid-state imaging device and reduction of yield. A solid-state imaging device including: a semiconductor substrate on which a plurality of photoelectric conversion devices are arranged in an imaging device region in a two-dimensional array; and a stacked body formed by stacking a plurality of layers on the semiconductor substrate, wherein the stacked body includes an in-layer lens layer that has in-layer lenses each provided at a position corresponding to each of the photoelectric conversion devices; a planarization layer that is stacked on the in-layer lens layer and that has a generally planarized surface; and an on-chip lens layer that is an upper layer than the planarization layer and that has on-chip lenses each provided at a position corresponding to each of the photoelectric conversion devices, and the in-layer lens layer has a plurality of structures at a height generally equal to a height of the in-layer lenses, the plurality of structures being provided on an outside of the imaging device region.


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