The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 16, 2024

Filed:

Jun. 28, 2022
Applicant:

Nxp B.v., Eindhoven, NL;

Inventor:

Muhammed Bolatkale, Delft, NL;

Assignee:

NXP B.V., Eindhoven, NL;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/10 (2006.01); H03M 1/00 (2006.01); H03M 1/06 (2006.01); H03M 3/00 (2006.01); H03M 1/12 (2006.01);
U.S. Cl.
CPC ...
H03M 1/001 (2013.01); H03M 1/0629 (2013.01); H03M 1/00 (2013.01); H03M 1/12 (2013.01); H03M 3/00 (2013.01);
Abstract

There is described a hybrid ADC device for converting an analog input signal (Vin) into a digital output signal (Vout), the device comprising a first ADC circuit configured to receive the analog input signal (Vin) and convert it into a first digital signal (Y); a DAC circuit configured to receive the first digital signal and convert it into a first analog signal; a delay circuit configured to delay the analog input signal; a first combiner configured to generate an analog residual signal by subtracting the first analog signal from the delayed analog input signal; a second ADC circuit configured to receive the residual analog signal and convert it into a second digital signal (Y); a filter circuit configured to receive the first digital signal and output a filtered first digital signal (Y′), the filter circuit having a transfer function corresponding to a combined transfer function of the DAC circuit and the second ADC circuit; and a second combiner configured to generate the digital output signal (Vout) by adding the second digital signal and the filtered first digital signal, wherein the first ADC circuit comprises an anti-aliasing filter. Furthermore, a corresponding method and an automobile radar system are described.


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