The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 16, 2024

Filed:

Apr. 30, 2021
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Jonathan Andrew Montoya, Dallas, TX (US);

Salvatore Franks Pavone, Murphy, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/564 (2013.01); H01L 24/03 (2013.01); H01L 24/05 (2013.01); H01L 24/13 (2013.01); H01L 2224/0346 (2013.01); H01L 2224/0391 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/05024 (2013.01); H01L 2224/13026 (2013.01); H01L 2924/05042 (2013.01); H01L 2924/07025 (2013.01);
Abstract

In some examples, a semiconductor package includes a semiconductor die; a passivation layer abutting a device side of the semiconductor die; a first conductive layer abutting the device side of the semiconductor die; a second conductive layer abutting the first conductive layer and the passivation layer; a silicon nitride layer abutting the second conductive layer, the silicon nitride layer having a thickness ranging from 300 Angstroms to 3000 Angstroms; and a third conductive layer coupled to the second conductive layer at a gap in the silicon nitride layer, the third conductive layer configured to receive a solder ball.


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