The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 16, 2024

Filed:

Mar. 14, 2022
Applicant:

Samsung Electro-mechanics Co., Ltd., Suwon-si, KR;

Inventors:

Je Jung Kim, Suwon-si, KR;

Ji Won Lee, Suwon-si, KR;

Ye Jin Jeong, Suwon-si, KR;

Jae Joon Lee, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01G 4/12 (2006.01); H01G 4/232 (2006.01); H01G 4/248 (2006.01); H01G 4/30 (2006.01);
U.S. Cl.
CPC ...
H01G 4/12 (2013.01); H01G 4/232 (2013.01); H01G 4/248 (2013.01); H01G 4/30 (2013.01);
Abstract

A multilayer ceramic capacitor includes a body including a dielectric layer and first and second internal electrodes alternately disposed with the dielectric layer interposed therebetween, a first external electrode disposed on the body and connected to the first internal electrode, and a second external electrode disposed on the body and connected to the second internal electrode. The dielectric layer includes a first dielectric layer adjacent to the first internal electrode, a second dielectric layer adjacent to the second internal electrode, and a third dielectric layer disposed between the first and second dielectric layers. D1<D3 and D2<D3, in which D1 is an average particle size of dielectric grains included in the first dielectric layer, D2 is an average particle size of dielectric grains included in the second dielectric layer, and D3 is an average particle size of dielectric grains included in the third dielectric layer.


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